Kintex-7 FPGA

Supported FPGA/CPLDs: 28nm based-product

Kintex™-7 FPGAs offer high-density logic, high-performance connectivity, memory, and DSP, plus Agile Mixed Signal all to enable higher system-level performance and integration.

Fabricated on a 28nm process, all 7 series FPGAs share a unified architecture. This innovation enables design migration across the Artix™-7, Kintex-7, and Virtex®-7 FPGA families. System manufacturers can easily scale successful designs to address adjacent markets requiring reduced cost and power or increased performance and capability. The adoption of AMBA 4, AXI4 specification as part of the interconnect strategy supporting Plug-and- Play FPGA design further improves productivity with IP reuse, portability, and predictability.

The Kintex-7 FPGA KC705 Evaluation Kit accelerates development and demonstration of radio/baseband, radar, EdgeQAM, triple-rate SDI and other applications for a broad range of markets that demand power-efficient high-speed communications and processing. Features include on-board PCI Express, Agile Mixed Signal (AMS), HDMI video output, and FPGA mezzanine card (FMC) connectors for smooth migration to the 7 series.

The Kintex-7 FPGA DSP Kit lets developers rapidly migrate to the 7 series using a platform that fosters innovative and highly differentiated solutions. Designers can reduce schedule risk, shorten time to market, and more quickly focus on adding unique value to solutions targeted for wireless communications infrastructure (remote radio heads, software-defined radio, DPG feedback, and more), aerospace and defense, instrumentation, medical imaging, and general-purpose data acquisition.


  • 28nm high-K metal gate (HKMG) process technology and a High-Performance, Low-Power (HPL) approach that drives up power efficiency
  • Performance boosting innovations, including industry-leading 1,866 Mbps memory interface; 639 MHz DSP48E1 slices with high-performance filtering capabilities, combined with the six-input look-up table for flexible DSP designs


  • Dedicated hard memory Phy implementation provides a simplified interfacing to external DDR memory
  • Package optimized to line rate performance
  • A flexible, soft controller enabled by high-performance logic for calibration, access methods, and system interfaces


  • 1833Mbps memory interfaces
  • LVDS connectivity at 1.6G
  • Up to 1,920 DSP slices
  • High-speed PCI Express hard and soft IP
  • Integrated hard IP for PCI Express, with full support for PCI Express endpoint and root port configurations
  • Hard IP support for up to eight PCI Express Gen1 and Gen2
  • Soft IP support for up to eight PCI Express Gen3 channels


To learn more about Xilinx Kintex-7 FPGAs please visit www.xilinx.com/kintex7


Aerospace/Defense, Consumer, Medical Imaging, Wireless Communcations


Contact Information


2100 Logic Drive
San Jose, CA, 95124

tele: 408-559-7778

Share and Enjoy:
  • Digg
  • Sphinn
  • del.icio.us
  • Facebook
  • Mixx
  • Google
  • TwitThis