Global Semiconductor Sales Grow at Fastest Rate in Almost Two Years on Sequential Monthly Basis, Top $24 Billion for First Time in 2012

Industry projects slight increase in global sales in 2012, followed by more robust growth in 2013 and 2014 The Semiconductor Industry Association (SIA), representing U.S. leadership...

Extension Media Interview with Microchip's Joe Drzewiecki

Editor Chris Ciufo spent time with Microchip software manager Joe Drzewiecki at the Spring DESIGN West show (formerly known as ESC). Microchip launched their new MPLAB X compiler strategy that now goes across all Microchip MCUs. It also adds a new license strategy, optimizations that compile 35 percent faster on 32-bit devices (or save 35 percent on code size). There's also a "totally free" version of the MPLAB X compiler. Check out the 3 minute video.

Texas Instruments' DESIGN West interview: From ANT to ZigBee

At DESIGN West 2012 (aka "ESC" San Jose), Senior Editor Chris A. Ciufo sat down with TI's Matt Kurtz, Manager, Wireless Connectivity Group. Matt's group's job is to add wireless capabilities to microcontrollers with "everything from ANT to ZigBee". Consider their SimpleLink initiative, which is comprised of chipsets, protocols, APIs and drivers that make easy the task of adding wireless to a TI microcontroller product. In this short video, Matt explains that TI's focus is one-stop-shopping and simplicity. Judging from market feedback, TI has met its goals.

8-bit PIC gives much more, for much, much less

Editor Chris. A. Ciufo gets the low-down from the DESIGN West conference.
At the recent DESIGN West conference in San Jose (formerly known as "ESC"), Microchip unleashed a new C-compiler strategy for its entire line-up, and a new low-cost 8-bit PIC MCU called the PIC16F178X. I got a chance to chat briefly with Greg Brown, Product Marketing Manager for the MCU8 division of Microchip. Click on the video to hear this on-target 3-minute interview.

Check out our 3-minute video interview with the product's Marketing Manager to learn more.

Extreme Low Power XLP 16-bit Development Board

http://www.microchip.com/xlp This video shows you all the features available on Microchips XLP 16-bit Development Board for extreme low power application design. The board supports development on PIC24F16KA102, PIC24FJ64GA102 and PIC24FJ64GB002 families of 16-bit PIC® MCUs featuring nanoWatt XLP technology.

Demo of eXtreme Low Power (XLP) MCUs

Today's applications must consume little power, and in extreme cases, last for up to 15-20 years, while running from a single battery. To enable applications like these, products with Microchip's nanoWatt XLP Technology offer the industry's lowest currents for Run and Sleep, where extreme low power applications spend 90%-99% of their time.

XLP 16-Bit Energy Harvesting Development Kit (Microchip Technology)

Solar Energy Harvesting using PIC® MCUs with XLP Technology

The World's Lowest Power in Sleep MCU: nanoWatt XLP from Microchip

http://www.microchip.com/xlp Three of nanoWatt XLP Technologys key advantages are: Sleep currents down to 20 nA, Real-Time Clock currents down to 500 nA, and Watchdog Timer currents down to 400 nA. The majority of low-power applications require one or more of these features. nanoWatt XLP Technology combines all three.

Improved Graphics Performance Changes the Cost Equation in Digital Signage

The quality and flexibility of digital signage is a function of the graphics processing capability of the media players that drive the displays. To deliver a high level of graphics performance, media players tend to incorporate discrete graphics processing units, although some players use the graphics engine on the CPU platform. Discover how 3rd Generation Intel® Core™ processors provide retailers improved graphics performance and anonymous video analytics to deliver audience messaging at lower cost and watt.

Lowering Power at 28 nm with Xilinx 7 Series FPGAs

This white paper describes several aspects of power related to the Xilinx® 28 nm 7 series FPGAs, including the TSMC 28 nm high-k metal gate (HKMG), high performance, low power (28 nm HPL or 28 HPL) process choice. The power benefits afforded by the 28 HPL process and its usefulness across Xilinx's full product offerings is described as well as the architectural innovations and features for power reduction across the dimensions of static power, dynamic power, and I/O power.

Getting Started with Artix-7 FPGAs

Conceived and designed for high-volume markets, Artix-7 FPGAs deliver the lowest power consumption and lowest cost in the 7 series. The family shares the same building blocks as the Kintex-7 and Virtex-7 FPGA architecture on the same 28 nm High Performance, Low Power (HPL) process, but transistor-level design choices enable the Artix-7 family to offer much lower power consumption while still meeting the performance needs of the target applications.

Improving Proximity and Touch Interfaces: Capacitive Sensors with Auto-Calibration

Human interfaces that use capacitive sensors for proximity or touch control are changing the way we interact with electronics.

Digital Video Drives the Design of Next-Generation Personal Computing Devices

Five Trends that Affect IC Designers, ODMs, and OEMs—and What They Can Do About Them.

Designing For Low Power

Power consumption is becoming an increasingly important variable when it comes to calculating OPEX and carbon footprint for telecom infrastructure projects.

A Primer on Obtaining IEC 61850-3 Certification for Embedded Computers

IEC 61850 is an Ethernet-based protocol standard used mainly in substations for data communication. Substations use a number of controllers for a variety of purposes, including protection, measurement, detection, alarms, and monitoring.